verilog-format-master.zip
资源来源:本地上传资源
文件类型:ZIP
大小:378.12KB
评分:
5.0
上传者:qq_34022877
更新日期:2022-03-03
verilog-format的配置文件
资源文件列表(大概)
文件名
大小
verilog-format-master/
-
verilog-format-master/.gitignore
22B
verilog-format-master/README.md
4.81KB
verilog-format-master/bin/
-
verilog-format-master/bin/verilog-format-LINUX.zip
128.26KB
verilog-format-master/bin/verilog-format-WIN.zip
138.44KB
verilog-format-master/build-dist
347B
verilog-format-master/images/
-
verilog-format-master/images/verilog-format.gif
59.16KB
verilog-format-master/launch-linux/
-
verilog-format-master/launch-linux/build-dist
54B
verilog-format-master/launch-linux/verilog-format
154B
verilog-format-master/pom.xml
4.32KB
verilog-format-master/src/
-
verilog-format-master/src/main/
-
verilog-format-master/src/main/java/
-
verilog-format-master/src/main/java/net/
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verilog-format-master/src/main/java/net/ericsonj/
-
verilog-format-master/src/main/java/net/ericsonj/commonscli/
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verilog-format-master/src/main/java/net/ericsonj/commonscli/CommonsCLI.java
2.77KB
verilog-format-master/src/main/java/net/ericsonj/commonscli/ConsoleApplication.java
1.89KB
verilog-format-master/src/main/java/net/ericsonj/util/
-
verilog-format-master/src/main/java/net/ericsonj/util/StringHelper.java
833B
verilog-format-master/src/main/java/net/ericsonj/verilog/
-
verilog-format-master/src/main/java/net/ericsonj/verilog/FileFormat.java
3.5KB
verilog-format-master/src/main/java/net/ericsonj/verilog/FormatSetting.java
1.56KB
verilog-format-master/src/main/java/net/ericsonj/verilog/Global.java
214B
verilog-format-master/src/main/java/net/ericsonj/verilog/IndentationStyle.java
2.53KB
verilog-format-master/src/main/java/net/ericsonj/verilog/LineIndentable.java
801B
verilog-format-master/src/main/java/net/ericsonj/verilog/StatementState.java
564B
verilog-format-master/src/main/java/net/ericsonj/verilog/StyleImp.java
231B
verilog-format-master/src/main/java/net/ericsonj/verilog/VerilogBlock.java
2.24KB
verilog-format-master/src/main/java/net/ericsonj/verilog/VerilogFile.java
2.01KB
verilog-format-master/src/main/java/net/ericsonj/verilog/VerilogFormat.java
4.6KB
verilog-format-master/src/main/java/net/ericsonj/verilog/VerilogHelper.java
4.44KB
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/
-
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/AbstractLineDecoration.java
1.4KB
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/AbstractModuleAlign.java
2.67KB
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/AlignBlockingAssignments.java
566B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/AlignConsecutive.java
5.27KB
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/AlignLineComment.java
537B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/AlignNoBlockingAssignments.java
568B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/ModuleAlign.java
11.35KB
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/ModuleInstantiation.java
1.21KB
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/SpacesBeforeIfStatement.java
931B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/SpacesBlockingAssignment.java
832B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/SpacesInParentheses.java
785B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/SpacesInSquareBrackets.java
805B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/SpacesNoBlockingAssignment.java
713B
verilog-format-master/src/main/java/net/ericsonj/verilog/decorations/SpacesTrailingComment.java
1.67KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/
-
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/AbstractStatement.java
1.12KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Always.java
3.63KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/AlwaysState.java
569B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/BlockComment.java
1.56KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/BlockCommentState.java
596B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Case.java
3.39KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/CaseState.java
511B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/For.java
4.35KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/ForState.java
877B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Forever.java
4.45KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/ForeverState.java
893B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Function.java
3.13KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/FunctionState.java
523B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/If.java
12.9KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/IfState.java
864B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Initial.java
4.46KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/InitialState.java
896B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Module.java
2.39KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/ModuleState.java
562B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Repeat.java
4.44KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/RepeatState.java
889B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/Task.java
3.03KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/TaskState.java
511B
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/While.java
4.41KB
verilog-format-master/src/main/java/net/ericsonj/verilog/statements/WhileState.java
885B
verilog-format-master/verilog/
-
verilog-format-master/verilog/.verilog-format.properties
231B
verilog-format-master/verilog/fsmtx.v
5.62KB
verilog-format-master/verilog/genrom.v
1.14KB
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verilog-format的配置文件用户评论 (0)
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